Other • 2-D meshes are one of the easiest topologies to visualize – nodes are connected in a “grid” fashion (see Figure). The simple layout also allows many problems to map easily to the structure of this network. 2-D Mesh and 2-D Toroid 2-D meshes have unequal node degree. The node degree...
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3 D Meshes and 3 D Toroids
Other • 3-D meshes and 3-D toroids are similar to 2-D meshes and toroids, except the 3-D mesh/toroid is expanded along the Z-axis to provide another dimensional layer of nodes. In the case of the 3-D toroid, the topmost nodes (along the new Z-axis) are connected to the bottommost nodes (see Figure)....
Acronyms
Other • Acronym Definition A/D Analog-to-Digital (as in A/D converter) ACK Acknowledge ADC Analog-to-Digital Converter API Application Program Interface APID Application Identifier APP Application CCC Cube-Connected Cycles CCITT From French: Comité Consultatif International Téléphonique et Télégraphique International Telegraph and Telephone Consultative Committee CC-NUMA Cache Coherent-Non-Uniform Memory Access CCSDS Consultative Committee for Space...
Advantages of JAS
Other • A modern node-based architecture with reconfigurable node electronics and serial data links between nodes provides the core structure and flexibility needed to enable most of the design strategies. It offers a powerful, yet efficient, modular solution that can be scaled and configured to support payloads of virtually any size and...
Analog to Digital Converter and Multiplexer
Profile • SMAC ADC and Analog MUX The SMAC shall include an ADC to take analog measurements of board parameters (voltage, current, temperature). These values are returned to the system controller as SOH information. An analog MUX may be required so that multiple analog values can be read by the ADC. The...
Backplane Connectors
Specification • JAS electrical design should utilize commercial connector standards when applicable. The VPX plug-in module to backplane connector is a Tyco Electronics MultiGig RT2 connector system which was chosen for its rugged mechanical performance and high-speed electrical performance, rated to 6.4 Gb/s and demonstrated to support data rates greater than 10...
Backplane Topology
Specification • The backplane is a key element in achieving high-speed connections between the plug-in modules or nodes in the case of a JAS system. VPX compliant backplanes support a minimum signaling rate of at least 3.125 Gbps on any differential point-to-point connection. There are a small number of required signals on...
Buckling and Crippling
Specification • Evaluation of buckling strength shall consider the combined action of primary and secondary stresses and their effects on general instability, local or panel instability, crippling, and creep.
Characteristics
Other • The table below describes the characteristics of JAS. Characteristic Definition Modularity Modular, scalable design capable of accommodating a wide range of applications, complexities and performance needs Configurable Topology Flexible, node-based, topologically configurable architecture that can be easily sized, configured and optimized to meet connectivity and robustness needs of a broad...
Cleanliness
Specification • Cleanliness is an important design consideration which can be mitigated by the mechanical structure and processes. Systems adjacent to an optical payload may have more strict cleanliness requirements than non-optical payload. The following sections describe the requirements which deal with Cleanliness considerations for the JAS mechanical structure.
Coating Surface Resistivity
Specification • The thickness of all chemical film treatments need to be controlled to provide low surface resistivity. Surface resistivity shall be less than 1 x 109 ohm/ square.
Coating Volume Resistivity
Specification • All paints and coatings shall have a volume resistivity less than 1 x 109 ohm-cm.
Coincidence Distribution
Other • The figure below illustrates how the JAS supports intra-payload coincidence and triggering. There are two options: Serial Packets JAS nodes can transmit packetized signals via the communications architecture if latency requirements are not too stringent. Discrete Signals Discrete coincidence and trigger signals can be added to any node through the...
Command and Host Processor Profile
Other • The Command and Host Processor (CH) profile defines a microprocessor-based solution suitable to construct nodes for mission data processing, spacecraft interfaces, and other applications requiring software execution on microprocessor platforms. Nodes based on the CH profile work alongside other nodes within the JAS architecture. The SMAC Profile and the Communication...
Communication Data Links
Specification • JAS nodes should communicate through one or more standard communications protocols. Serial communication protocols are the recommended approach but JAS does not preclude the use of parallel communication protocols. JAS also does not preclude the use of custom or legacy based communications.
Communications Profile
Other • The Communications Profile defines standard interfaces for facilitating communication between nodes within a JAS system. The Communications Profile focuses primarily on communication between payload applications. It leverages industry standards to support network-based communication using serial interfaces. Adherence to the Communications Profile and Communications Specification is the minimum required for a...
Complete and Incomplete Hypercubes
Other • An overall good performer, hypercubes are very reliable and offer good performance. Complete hypercubes have fixed size of 2^d (i.e., 4, 8, 16, 32, 64, etc, nodes) but an extension to this structure (incomplete hypercubes) allows for arbitrary size. Hypercubes are constructed by beginning with two interconnected nodes (a 1-D...
Coordinate Definition
Specification • The JAS mechanical structure shall implement a coordinate system as a reference point for the design. The mounting of each component should be considered as the coordinate reference. The coordinate frame can originate on a pin-and-slot mounting. [Placeholder: Defining a coordinate frame helps to determine center of gravity, mass, envelopes...
Cube Connected Cycles
Other • Cube-connected cycles (CCC) are structures based on hypercubes (see Figure). Given a hypercube of dimension d, each hypercube node is replaced with a ring of size d. This causes the node degree of all nodes to be fixed at 3 regardless of network size! This structure excels when the port...
Custom Communications
Specification • Custom communications specifications by definition are not described by any single specification. The electrical parameters will be determined by the components involved in the design. For example, if the communications utilize gigabit (GTX) transceivers in an FPGA then the electrical requirements will be prescribed by the GTX specifications.
Design Constraints
Specification • The following sections define some important design constraints that the program will levy on the system. The constraints will drive many of the choices in designing the mechanical system.
Design Thickness
Specification • For strength and buckling analyses, minimum material thickness shall be used. Minimum thickness is defined as the nominal thickness minus the lower tolerance and applies to metallic and nonmetallic structural elements. For modeling purposes and stiffness calculations, use nominal or expected values. For flexures the Maximum blade thickness shall be...
Design Ultimate Load
Specification • The JAS mechanical structure shall have sufficient strength to simultaneously withstand design ultimate loads, the corresponding temperature, pressure and accompanying environmental phenomena without failure.
Design Yield Load
Specification • The JAS mechanical structure shall withstand design yield loads, the corresponding temperature, pressure and associated environmental phenomena without permanent deformations, or permanent misalignments, of all components.
Discrete Signaling
Profile • SMAC Discrete I/O and Data Bus Signaling The SMAC has capabilities to read and drive both discrete I/O values and data buses. The FPGA I/O dedicated for this purpose can be either configured as dedicated inputs and outputs or can be bi-directional with input or output behavior configured through the...
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