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Mezzanine Connector

Specification • A very useful option for plug-in modules is the ANSI/VITA 57 standard FPGA Mezzanine Card or FMC. This standard specifies an industry standard form factor utilizing a low profile, high-speed, high-pin count connector. The FMC connector can support very high bandwidths. The FMC approach solves the problem of how to...

Electrical Specification > Electrical Interconnects > Mezzanine Connector

Molecular Contamination

Specification • For all components that will be in the vicinity of an optical payload and anywhere that contamination at the molecular level is an issue, all parts and materials must comply with ASTM E 595 for less than 1% Total Mass Loss (TML) and 0.1% CVCM. Thermal bake-out of all components...

Mechanical Specification > Design Constraints > Cleanliness > Molecular Contamination

Network Topologies

Other • The selection of network topology is a critical component when developing multi-node or multi-point system architectures. A good choice of topology will require less power, have less complexity, higher reliability, and will orchestrate network traffic smoothly and quickly between nodes. Conversely, a poor choice of topology will introduce complex and...

Joint Architecture Standard Overview > Network Topologies

Obscuration

Specification • All JAS mechanical structure components shall be placed to prevent obscuration of the system view of space if the JAS electronics box will be used to radiate. Structural elements shall be kept an appropriate distance away from the JAS electronics housings.

Mechanical Specification > Design Constraints > Obscuration

Operating Temperatures

Specification • Operational temperatures are provided in thermal study for the nominal orbit. Excursions from predicted operational temperatures shall be increased by 11C (bilateral) when these temperatures are utilized in all fatigue analysis. For the purposes of fatigue the temperature excursion within an orbital season may be considered. For the purposes of...

Environmental Specification > Operating Temperatures

Packaging for Thermal Dissipation

Specification • The preliminary JAS mounting details are defined by the baseplate details in ICD drawing xxxxxx. The JAS electronics box is meant to mount through the blue baseplate shown in the figure below. The figure shows a nominal 3x3 stack in an exploded view. JAS Mounting Exploded View Conducted Self-radiated panels...

Mechanical Specification > Environmental Exposure > Packaging for Thermal Dissipation

Particulate Contamination

Specification • Internal Cavities will be wiped clean with isopropyl alcohol and allowed to air dry for 30 minutes prior to close out; the structure will be covered during the drying process. The surfaces will be visibly clean. Visibly clean is defined as no contamination visible when viewed from 6-18 inches away...

Mechanical Specification > Design Constraints > Cleanliness > Particulate Contamination

PCI Express

Specification • PCI Express, or PCIe, is another multi-lane high speed serial interconnect technology. Each lane is a full-duplex data stream comprised of two differential signaling pairs, one for transmitting and one for receiving.

Electrical Specification > Communication Data Links > PCI Express

Potential Flight Capability

Specification • Each component of the JAS mechanical structure should consider Flight capability as this will force consideration of design, flight, and test environments described in this specification. The JAS mechanical structure should be designed for the specific application intended.

Mechanical Specification > Mechanical Interface Design > Potential Flight Capability

Power Distribution Architecture

Specification • JAS will accept at least one primary input power source supplied to the system. The primary input power will connect directly to the Power Supply or PS node in a JAS arrangement. The PS node converts the primary input voltage to a lower voltage which is then sent to all...

Electrical Specification > Power Distribution Architecture

Power Supply Profile

Other • The PS profile defines a high-performance power solution, suitable for powering JAS nodes. The PS profile works alongside other nodes within the JAS architecture. The SMAC and Communications profile implement connectivity and data transfer from PS nodes to other nodes in the system. Power Supply Node The figure below illustrates...

Joint Architecture Standard Overview > JAS Profile Introductions > Power Supply Profile

Pressure

Specification • The JAS structure shall meet all performance specifications during and after exposure to pressures varying from atmospheric to the space environment of 10-14 Torr. All thermal-vacuum ground based testing shall be conducted at pressures less than 10-6 Torr.

Environmental Specification > Pressure

Pressure Change

Specification • The structure shall be designed to survive the change of pressure specified in the figure below. The launch and ascent pressure environment will lie between Pc(Max) and Pc(MIN). Pressure Change Within the envelope defined in figure above, the local rates of change will remain between the values shown in the...

Environmental Specification > Pressure > Pressure Change

Quasi-Static Loads

Specification • Quasi-static loads shall be applied per the program Strength Qualification Plan. The axial and radial acceleration loads are to be applied simultaneously for an 11 g (TBD?) load in the worst case direction.

Environmental Specification > Loads > Quasi-Static Loads

Radiation Effects Mitigation

Specification • The primary space effect requiring mitigation is the radiation environment, which causes gradual degradation of electronic devices and single event effects (SEE). Parts that have demonstrated destructive SEE, such as SEL or SEGR, should not be incorporated into the node unless absolutely necessary. It is equally important to test the...

Environmental Specification > Radiation Effects Mitigation

Rear Transition Module

Profile • This instantiation provides a breakout for backplane signals per the VITA 46.10 specification. A rear transition module (RTM) attaches to the back side of a backplane directly behind and in-line with a front plug-in module (usually a node). The RTM provides accessibility to signals such as communication breakouts, power connectivity,...

Expansion Profile > Applications > Rear Transition Module

Rear Transition Module

Specification • The rear transition module (RTM) of the VPX standard is a plug-in module at the back of the circuit card chassis that is in line with the front plug-in module or node. The backplane connectors on the RTM are the same as those used on the plug-in nodes. Also, as...

Electrical Specification > Electrical Interconnects > VPX > Rear Transition Module

Reconfigurable Processing Profile

Other • The Reconfigurable Processing (RP) profile defines a high-performance processing solution suitable for constructing nodes for mission data processing, sensor interfaces, and other applications requiring high-bandwidth processing and communications. Nodes based on the RP profile work alongside other nodes within the JAS architecture. The SMAC Profile and the Communication Profile implement...

Joint Architecture Standard Overview > JAS Profile Introductions > Reconfigurable Processing Profile

Screened Venting

Specification • Where venting requires a screen to maintain cleanliness requirements, based on a 5µ Pall Rigidmesh screen, there shall be 1.5 in^2 or greater screen area per ft^3 of volume where the volume is the sum of multiple daisy-chained volumes. The daisy chained volumes shall be vented.

Mechanical Specification > Environmental Exposure > Venting > Screened Venting

Secondary POL Conversion

Specification • JAS nodes should include POL conversion as needed. POL conversion has become very popular as the voltage requirements of electronic components have continued to drop. It is quite common for many digital electronic devices to use voltages of 1.8 VDC and below. Routing high current, low voltages around a printed...

Electrical Specification > Power Distribution Architecture > Secondary POL Conversion

Serial RapidIO

Specification • Serial RapidIO (or just RapidIO) is a high-performance packet-switched, interconnect technology utilizing either 8b/10b or 64b/67b encoding on data links, or lanes, with speeds up to 6.25 Gbps. Multiple lanes may be used in increase data throughput.

Electrical Specification > Communication Data Links > Serial RapidIO

Results 76–100 of 117