Joint Architecture Standard Overview Profile
Characteristics
Domain(s)
Space
System(s)
Satellite
Profile(s)
CH, COMM, EXP, PS, RP, SMAC
The table below describes the characteristics of JAS.
| Characteristic | Definition |
| Modularity | Modular, scalable design capable of accommodating a wide range of applications, complexities and performance needs |
| Configurable Topology | Flexible, node-based, topologically configurable architecture that can be easily sized, configured and optimized to meet connectivity and robustness needs of a broad range of applications |
| Node Building Blocks | A set of common configurable and reconfigurable FPGA-based node module (building block) designs adaptable to interface with and support virtually any sensor suite |
| Standard Protocols | Adherence to standardized serial interconnect protocols, including SpaceWire, Ethernet, Serial RapidIO and PCI Express |
| Rapid Development | Common nodes and standard protocols reduce development time and optimize time to delivery |
| Universal & Transparent Communications | Common communications protocols facilitate rapid integration of JAS nodes. Transparent inter-node communications: messaging between system elements as simple as writing and reading data to and from memory |
| General Purpose Processors | Soft-core “general purpose” processors may be employed to meet a broad range of autonomous control and onboard data processing needs |
| Digital Signal Processors | Soft-core Digital Signal Processors (DSPs) may be employed to meet high-speed signal processing needs |
| Radiation Hardened Processors | Dedicated radiation hardened processors for applications that require reliability advantages over soft-core processors |
| Custom Logic | Custom FPGA-based processing logic to meet special needs that are not well-suited to soft-core processor implementation |
| Memory | Device-independent memory interface that anticipates future generations of memory devices |
| Host Platform Compatibility | Flexibility to meet electrical, mechanical, thermal and data interface requirements imposed by host platforms at minimal cost |
| Redundancy Options | Multiple redundancy options for optimizing reliability within SWAP constraints |
| Physical Configuration | Flexibility for locating hardware in common or in separate enclosures to meet payload and host platform constraints |
| Reconfiguration | “Hardware” reconfigurability and software reprogrammability for addressing design errors, on-orbit anomalies, design upgrades and other unforeseen circumstances |
| Power Management | Network connected nodes with Point-of-Load (POL) converters allow spare nodes to be powered down until needed, isolate and power down failed node components, and allow for the reduction in power by taking selected nodes off line; and in concert with selectable clock rates minimize power drawn by operating nodes |
| Universal Support Test Equipment (STE) | Availability of a common, COTS-based development and test tool set. Easy to test, power-on, self-test and COTS tester interfaces |
| Simplified Mechanical Designs | Simplified mechanical designs based on standard building blocks and the potential for automated, parameterized designs |
| Ionizing Radiation Mitigation | Supports multiple options for radiation effects mitigation (process, geometry, TMR, etc.) |
| Technology Endurance | Core architecture designed to be compatible with and evolve with technology advancements |
| Rapid System Demonstration | Provisions for rapid prototyping and early system development via standard modules and pre-qualified reference designs |
| Size, Weight and Power | Reduced SWAP through more compact and capable FPGA-based modules, M-of-N redundancy, high-speed serial interfaces and other modernization |
| Reduced Cost | Reduced cost through leveraging of industry standards, COTS hardware and software and IP, together with economies of scale achieved across projects at laboratories, interlaboratory collaboration and design sharing, streamlined development based on COTS tool sets and design re-use within and across systems and laboratories |
| Legacy Design Compatibility | Easily interfaced to existing system architectures via one or more high-speed serial interfaces to form hybrid architectures for near-term solutions |
Characteristics of JAS