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Applications

Profile • Common instantiations of the CH profile include, but are not limited to: Host Vehicle Interface and Configuration Manager Mission Data Processing Non-Volatile Memory Storage Mass Memory Node The CH node can operate in several capacities, the most essential of which is the Host Vehicle Interface and Configuration Manager. However, several...

Command and Host Processor Profile > Applications

Command and Host Processor Profile

Profile • The Command and Host Processor (CH) profile defines a microprocessor-based solution suitable to construct nodes for mission data processing, spacecraft interfaces, and other applications requiring software execution on microprocessor platforms. The CH profile works alongside the RP Profile and PS Profile to implement nodes within the JAS architecture. The SMAC...

Command and Host Processor Profile

Companion Field Programmable Gate Array

Profile • A separate radiation-hardened companion FPGA is present on the CH node to implement timing functions, custom peripherals, and bridge to proprietary interfaces that may not be directly supported by the microprocessor. The FPGA typically attaches to the microprocessor through industry-standard bus interfaces, though the exact connection method will vary based...

Command and Host Processor Profile > Functional Description > Companion Field Programmable Gate Array

Extended Capabilities

Profile • CH Node Extended Capabilities Customization and extension of CH node capabilities can be realized through instantiations of the Expansion Profile. In instances where custom electronics are needed (for example, spacecraft interfaces or attachments to expansion memory), mezzanines or custom backplane routing to other boards connect electronics to the CH node...

Command and Host Processor Profile > Functional Description > Extended Capabilities

Functional Description

Profile • The CH profile defines the technologies that comprise the CH node, including both required and recommended components to define this standard node type. A CH node should be universally designed to minimize the number of unique instantiations of this profile. A block diagram of a CH node is shown below....

Command and Host Processor Profile > Functional Description

Gigabit Interfaces

Profile • Gigabit interfaces are those that run at line speeds of one gigabit per second and above (>1 Gbps). These interfaces are often tasked with the primary purpose of pushing large amounts of mission data to other nodes for processing. Some examples of these interfaces include: Serial RapidIO SpaceFibre Gigabit Ethernet...

Command and Host Processor Profile > Network Interfaces > Gigabit Interfaces

Host Vehicle Interface and Configuration Manager

Profile • The primary role of the CH node in this application is to connect payloads to the host vehicle and to serve as the system controller for payload operations. These functions are implemented through software services running on the radiation-hardened microprocessor. Host Vehicle Interface and Configuration Manager Instantiation A radiation-hardened FPGA...

Command and Host Processor Profile > Applications > Host Vehicle Interface and Configuration Manager

Mechanical

Profile • The recommended CH implementation is on a 6U VPX board, as defined in the VITA 46 standard and the Mechanical Specification. VPX is preferred for a number of reasons, a few of which include: 3U and 6U board formats to accommodate varying sizes High-density connectors and flexible pinout Availability of...

Command and Host Processor Profile > Mechanical

Megabit Interfaces

Profile • There are several megabit interfaces that may be utilized on the CH node. Some examples of these include: SpaceWire RS-422, RS-232 MIL-STD-1553 CAN bus SpaceWire is the preferred solution for systems requiring data rates below 200 Mbps. SpaceWire links can scale from 2 to 200 Mbps at full duplex and...

Command and Host Processor Profile > Network Interfaces > Megabit Interfaces

Memory Technologies

Profile • There are two types of memory technologies that are highly recommended for inclusion on the CH node: non-volatile flash or EEPROM, and higher-speed SRAM or SDRAM memory. Non-volatile memory is necessary to store the software that the microprocessor will execute upon power-up. Non-volatile memory may also be necessary to store...

Command and Host Processor Profile > Functional Description > Memory Technologies

Microprocessor

Profile • The CH Node is a microprocessor-based node that executes software stored in supplemental on-board memory. It is highly recommended that this microprocessor be radiation-hardened for reliability. The processor is typically attached to a non-volatile memory technology and a faster SRAM or SDRAM memory. A bus interface between the microprocessor and...

Command and Host Processor Profile > Functional Description > Microprocessor

Mission Data Processing

Profile • This application employs the CH node as a mission data processor, utilizing the radiation-hardened microprocessor and on-board memories to perform computations in support of the payload’s mission. Additional optional memories or other board capabilities may be built onto the expansion port if desired. Mission Data Processing Instantiation This application is...

Command and Host Processor Profile > Applications > Mission Data Processing

Network Interfaces

Profile • All JAS nodes communicate through a standard set of interfaces that adhere to standard protocols. Refer to the Electrical Specification for physical layer technical information and Communication Specification for details on standard data protocols. This section describes two classes of network interfaces, megabit interfaces with line speeds below one gigabit...

Command and Host Processor Profile > Network Interfaces